UPSTREAM: sb/intel/fsp_rangeley: Fix NULL check in gpio.c
This should always have been an and, not an or.
The only way this would happen is if no GPIOs were getting configured,
so we shouldn't ever have a NULL here, but if we did, GPIOs would
be randomly configured, which would have 'interesting' results.
BUG=none
BRANCH=none
TEST=none
Change-Id: I480ac3acde34c2f3d44424a001065f37a2428d72
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6e4cb50420
Original-Found-by: Coverity Scan #1229633 & 1229632
Original-Change-Id: If123372658383f84279738e1186425beba3208ca
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/18095
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/428255
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
parent
a62d077ded
commit
15095efc4b
1 changed files with 2 additions and 2 deletions
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@ -62,7 +62,7 @@ void setup_soc_gpios(const struct soc_gpio_map *gpio)
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/* GPIO PAD Settings */
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/* CFIO Core Well Set 1 */
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if ((gpio->core.cfio_init != NULL) || (gpio->core.cfio_entrynum != 0)) {
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if ((gpio->core.cfio_init != NULL) && (gpio->core.cfio_entrynum != 0)) {
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write32(cfiobase + (0x0700 / sizeof(u32)), (u32)0x01001002);
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for (cfio_cnt = 0; cfio_cnt < gpio->core.cfio_entrynum; cfio_cnt++) {
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if (!((u32)gpio->core.cfio_init[cfio_cnt].pad_conf_0))
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@ -76,7 +76,7 @@ void setup_soc_gpios(const struct soc_gpio_map *gpio)
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}
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/* CFIO SUS Well Set 1 */
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if ((gpio->sus.cfio_init != NULL) || (gpio->sus.cfio_entrynum != 0)) {
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if ((gpio->sus.cfio_init != NULL) && (gpio->sus.cfio_entrynum != 0)) {
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write32(cfiobase + (0x1700 / sizeof(u32)), (u32)0x01001002);
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for (cfio_cnt = 0; cfio_cnt < gpio->sus.cfio_entrynum; cfio_cnt++) {
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if (!((u32)gpio->sus.cfio_init[cfio_cnt].pad_conf_0))
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