From 15095efc4b70404ffe4e3c26d2050447c6cad5c4 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Tue, 10 Jan 2017 16:40:45 -0700 Subject: [PATCH] UPSTREAM: sb/intel/fsp_rangeley: Fix NULL check in gpio.c This should always have been an and, not an or. The only way this would happen is if no GPIOs were getting configured, so we shouldn't ever have a NULL here, but if we did, GPIOs would be randomly configured, which would have 'interesting' results. BUG=none BRANCH=none TEST=none Change-Id: I480ac3acde34c2f3d44424a001065f37a2428d72 Signed-off-by: Patrick Georgi Original-Commit-Id: 6e4cb50420b7ddfecf9388e8a3b000ecb6855054 Original-Found-by: Coverity Scan #1229633 & 1229632 Original-Change-Id: If123372658383f84279738e1186425beba3208ca Original-Signed-off-by: Martin Roth Original-Reviewed-on: https://review.coreboot.org/18095 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel Original-Reviewed-by: Nico Huber Reviewed-on: https://chromium-review.googlesource.com/428255 Commit-Ready: Aaron Durbin --- src/southbridge/intel/fsp_rangeley/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c index 2a2061cb1a..0a287c4dc4 100644 --- a/src/southbridge/intel/fsp_rangeley/gpio.c +++ b/src/southbridge/intel/fsp_rangeley/gpio.c @@ -62,7 +62,7 @@ void setup_soc_gpios(const struct soc_gpio_map *gpio) /* GPIO PAD Settings */ /* CFIO Core Well Set 1 */ - if ((gpio->core.cfio_init != NULL) || (gpio->core.cfio_entrynum != 0)) { + if ((gpio->core.cfio_init != NULL) && (gpio->core.cfio_entrynum != 0)) { write32(cfiobase + (0x0700 / sizeof(u32)), (u32)0x01001002); for (cfio_cnt = 0; cfio_cnt < gpio->core.cfio_entrynum; cfio_cnt++) { if (!((u32)gpio->core.cfio_init[cfio_cnt].pad_conf_0)) @@ -76,7 +76,7 @@ void setup_soc_gpios(const struct soc_gpio_map *gpio) } /* CFIO SUS Well Set 1 */ - if ((gpio->sus.cfio_init != NULL) || (gpio->sus.cfio_entrynum != 0)) { + if ((gpio->sus.cfio_init != NULL) && (gpio->sus.cfio_entrynum != 0)) { write32(cfiobase + (0x1700 / sizeof(u32)), (u32)0x01001002); for (cfio_cnt = 0; cfio_cnt < gpio->sus.cfio_entrynum; cfio_cnt++) { if (!((u32)gpio->sus.cfio_init[cfio_cnt].pad_conf_0))