From 12e763eece263f7251a5d409e282777653156602 Mon Sep 17 00:00:00 2001 From: Erik van den Bogaert Date: Mon, 24 Nov 2025 13:38:19 +0100 Subject: [PATCH] device/pci_ids: Add DIDs for TGL-H (GT1 and RM590E) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit adds the relevant DIDs to support Tiger Lake H (TGL-H) systems based on the Xeon W-11865MRE (GPU) and RM590E chipset (PCH). TEST=A platform with Xeon W-11865MRE and RM590E booted the relevant information printed in coreboot log. [DEBUG] CPU: ID 806d1, Tigerlake R0, ucode: 00000056 [DEBUG] MCH: device id 9a36 (rev 05) is Tigerlake-H-8-1 [DEBUG] PCH: device id 4390 (rev 11) is Tigerlake-H RM590E [DEBUG] IGD: device id 9a70 (rev 01) is Tigerlake H GT1 32EU Change-Id: I2bff2551b9f194e169c0edd080e9c869bcc9c60f Signed-off-by: Erik van den Bogaert Reviewed-on: https://review.coreboot.org/c/coreboot/+/90179 Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella Reviewed-by: Paul Menzel --- src/include/device/pci_ids.h | 2 ++ src/soc/intel/tigerlake/bootblock/report_platform.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 2c3723afa6..a3c3e58056 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3029,6 +3029,7 @@ #define PCI_DID_INTEL_TGP_H_ESPI_HM570 0x438B #define PCI_DID_INTEL_TGP_H_ESPI_QM580 0x438A #define PCI_DID_INTEL_TGP_H_ESPI_WM590 0x4389 +#define PCI_DID_INTEL_TGP_H_ESPI_RM590E 0x4390 #define PCI_DID_INTEL_MCC_ESPI_0 0x4b00 #define PCI_DID_INTEL_MCC_ESPI_1 0x4b04 #define PCI_DID_INTEL_MCC_BASE_ESPI 0x4b03 @@ -4434,6 +4435,7 @@ #define PCI_DID_INTEL_TGL_GT0 0x9A7F #define PCI_DID_INTEL_TGL_GT1_H_32 0x9A60 #define PCI_DID_INTEL_TGL_GT1_H_16 0x9A68 +#define PCI_DID_INTEL_TGL_GT1_H_32_1 0x9A70 #define PCI_DID_INTEL_TGL_GT2_ULT 0x9A49 #define PCI_DID_INTEL_TGL_GT3_ULT 0x9A52 #define PCI_DID_INTEL_TGL_GT2_ULX 0x9A40 diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c index 8f90b3c6a3..9667f1b13b 100644 --- a/src/soc/intel/tigerlake/bootblock/report_platform.c +++ b/src/soc/intel/tigerlake/bootblock/report_platform.c @@ -86,6 +86,7 @@ static struct { { PCI_DID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" }, { PCI_DID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" }, { PCI_DID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" }, + { PCI_DID_INTEL_TGP_H_ESPI_RM590E, "Tigerlake-H RM590E" }, }; static struct { @@ -93,6 +94,7 @@ static struct { const char *name; } igd_table[] = { { PCI_DID_INTEL_TGL_GT0, "Tigerlake U GT0" }, + { PCI_DID_INTEL_TGL_GT1_H_32_1, "Tigerlake H GT1 32EU" }, { PCI_DID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" }, { PCI_DID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" }, { PCI_DID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" },