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mb/google/ocelot/var/matsu: Fix GPP_V3 internal pull-up configuration

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According to doc#836031, GPP_V3 defaults to Native F1 with the integrated pull-up enabled. However, coreboot was configuring this pin with the internal pull-up set to NONE, which disabled the pull-up and caused GPP_V3/PWRBTN# to read low, leading to unexpected shutdowns.

Update the pad configuration to use the internal pull-up.

BUG=b:463193164
TEST=boots normally and no unexpected shutdown occurs.

Change-Id: Ia650aa9b60d7ce634827330954b1a9c9ac3d7567
Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90218
Reviewed-by: Bob Moragues <moragues@google.com>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ivy Jian 2025-11-26 08:49:37 +08:00 • committed by Matt DeVillier
commit 0e9d85425e
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/ocelot/variants/matsu/gpio.c
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@ -339,7 +339,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_V02: LANWAKE_N_R */
PAD_CFG_NF(GPP_V02, NONE, DEEP, NF1),
/* GPP_V03: PWRBTN_MCP_N */
PAD_CFG_NF(GPP_V03, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_V03, UP_20K, DEEP, NF1),
/* GPP_V04: PM_SLP_S3_N */
PAD_CFG_NF(GPP_V04, NONE, DEEP, NF1),
/* GPP_V05: PM_SLP_S4_N */