soc/intel/xeon_sp: Support GNR PCIe root ports

Add device IDs for GNR PCIe root ports so that these devices can
be supported by the Xeon-SP PCIe root port driver.

Change-Id: I450c0088aa2e3be60489becf0600f534ea90d7a4
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84311
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shuo Liu 2024-09-10 20:07:16 +08:00 committed by Lean Sheng Tan
commit 0dac2ad3aa

View file

@ -69,6 +69,14 @@ static const unsigned short pcie_root_port_ids[] = {
0x352c,
0x352d,
0x347a,
0x0db0,
0x0db1,
0x0db2,
0x0db3,
0x0db6,
0x0db7,
0x0db8,
0x0db9,
0
};