mb/starlabs/byte_adl: Enable Wake On Lan

Change-Id: I61e6e2b54fb41d610598af08b3f86009a5d539e5
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89783
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-10-28 09:28:16 +00:00
commit 0c3f304d5a
2 changed files with 9 additions and 0 deletions

View file

@ -7,6 +7,7 @@ config BOARD_STARLABS_BYTE_SERIES
select DRIVERS_EFI_VARIABLE_STORE
select DRIVERS_INTEL_PMC
select DRIVERS_OPTION_CFR_ENABLED
select DRIVERS_PCIE_GENERIC
select EC_STARLABS_ITE
select EC_STARLABS_MERLIN
select HAVE_ACPI_RESUME

View file

@ -154,6 +154,10 @@ chip soc/intel/alderlake
.PcieRpL1Substates = L1_SS_L1_2,
}"
chip drivers/pcie/generic
register "wake_gpe" = "GPE0_PME_B0"
device generic 0 on end
end
smbios_slot_desc "SlotTypePciExpressGen4x1"
"SlotLengthShort"
"SlotTypePci"
@ -167,6 +171,10 @@ chip soc/intel/alderlake
.pcie_rp_aspm = ASPM_L0S_L1,
.PcieRpL1Substates = L1_SS_L1_2,
}"
chip drivers/pcie/generic
register "wake_gpe" = "GPE0_PME_B0"
device generic 0 on end
end
smbios_slot_desc "SlotTypePciExpressGen3X4"
"SlotLengthShort"
"SlotTypePci"