soc/mediatek/mt8196: Add vcore DVFS settings
Add vcore settings, so that other tinysys (such as mcupm, spm, etc.) will reference these value during initialization. BUG=b:343878736 TEST=Build pass, boot successful. Check log with: [INFO] Vcore DVFS settings done Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86070 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
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4 changed files with 25 additions and 0 deletions
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@ -29,6 +29,7 @@ romstage-y += clkbuf_ctl.c
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romstage-y += ../common/dram_init.c
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romstage-y += ../common/dramc_param.c
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romstage-y += dvfs.c
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romstage-y += dvfsrc.c
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romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c
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romstage-y += ../common/emi.c
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romstage-y += irq2axi.c
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12
src/soc/mediatek/mt8196/dvfsrc.c
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12
src/soc/mediatek/mt8196/dvfsrc.c
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@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
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#include <console/console.h>
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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#include <soc/dvfsrc.h>
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void dvfsrc_opp_level_mapping(void)
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{
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setbits32p(DVFSRC_RSRV_4, BIT(VCORE_B0_SHIFT));
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printk(BIOS_INFO, "Vcore DVFS settings done\n");
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}
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@ -156,6 +156,7 @@ enum {
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SPM_PBUS_BASE = IO_PHYS + 0x0C00D000,
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RGU_BASE = IO_PHYS + 0x0C010000,
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RC_BASE = IO_PHYS + 0x0C011000,
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DVFSRC_BASE = IO_PHYS + 0x0C013000,
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GPT_BASE = IO_PHYS + 0x0C015000,
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VLP_CKSYS_BASE = IO_PHYS + 0x0C016000,
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PMIF_SPMI_P_BASE = IO_PHYS + 0x0C018000,
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11
src/soc/mediatek/mt8196/include/soc/dvfsrc.h
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src/soc/mediatek/mt8196/include/soc/dvfsrc.h
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@ -0,0 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
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#ifndef SOC_MEDIATEK_MT8196_MTK_VCORE
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#define SOC_MEDIATEK_MT8196_MTK_VCORE
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#define DVFSRC_RSRV_4 (DVFSRC_BASE + 0x290)
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#define VCORE_B0_SHIFT 23
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void dvfsrc_opp_level_mapping(void);
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#endif
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