diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index f5420ceae2..a445efd4e8 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -29,6 +29,7 @@ romstage-y += clkbuf_ctl.c romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c romstage-y += dvfs.c +romstage-y += dvfsrc.c romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c romstage-y += ../common/emi.c romstage-y += irq2axi.c diff --git a/src/soc/mediatek/mt8196/dvfsrc.c b/src/soc/mediatek/mt8196/dvfsrc.c new file mode 100644 index 0000000000..aea7302734 --- /dev/null +++ b/src/soc/mediatek/mt8196/dvfsrc.c @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include +#include +#include +#include + +void dvfsrc_opp_level_mapping(void) +{ + setbits32p(DVFSRC_RSRV_4, BIT(VCORE_B0_SHIFT)); + printk(BIOS_INFO, "Vcore DVFS settings done\n"); +} diff --git a/src/soc/mediatek/mt8196/include/soc/addressmap.h b/src/soc/mediatek/mt8196/include/soc/addressmap.h index e04c01bb55..65257eb769 100644 --- a/src/soc/mediatek/mt8196/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8196/include/soc/addressmap.h @@ -156,6 +156,7 @@ enum { SPM_PBUS_BASE = IO_PHYS + 0x0C00D000, RGU_BASE = IO_PHYS + 0x0C010000, RC_BASE = IO_PHYS + 0x0C011000, + DVFSRC_BASE = IO_PHYS + 0x0C013000, GPT_BASE = IO_PHYS + 0x0C015000, VLP_CKSYS_BASE = IO_PHYS + 0x0C016000, PMIF_SPMI_P_BASE = IO_PHYS + 0x0C018000, diff --git a/src/soc/mediatek/mt8196/include/soc/dvfsrc.h b/src/soc/mediatek/mt8196/include/soc/dvfsrc.h new file mode 100644 index 0000000000..e4d874032c --- /dev/null +++ b/src/soc/mediatek/mt8196/include/soc/dvfsrc.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef SOC_MEDIATEK_MT8196_MTK_VCORE +#define SOC_MEDIATEK_MT8196_MTK_VCORE + +#define DVFSRC_RSRV_4 (DVFSRC_BASE + 0x290) +#define VCORE_B0_SHIFT 23 + +void dvfsrc_opp_level_mapping(void); + +#endif