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mb/trulo/var/pujjolo: Add MB usb-a port3 function.

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Add usb-a port3 setting to let funtion work fine.

BUG=b:395763555
BRANCH=none
TEST=Build and boot to pujjolo. Verify functions work.

Change-Id: I132f34a5c341f64d829bb78be9d400a77889f291
Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87998
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Luca Lai 2025-06-08 23:01:25 +08:00 • committed by Subrata Banik
commit 08c8a74170
1 changed files with 8 additions and 0 deletions
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8
src/mainboard/google/brya/variants/pujjolo/overridetree.cb
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@ -38,6 +38,7 @@ chip soc/intel/alderlake
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB-A0
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB-A1
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # WWAN
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # UF Camera
@ -534,6 +535,13 @@ chip soc/intel/alderlake
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A1 (DB)""
register "type" = "UPC_TYPE_A"