From 08c8a74170d49c19311aa266e09c864863a0437b Mon Sep 17 00:00:00 2001 From: Luca Lai Date: Sun, 8 Jun 2025 23:01:25 +0800 Subject: [PATCH] mb/trulo/var/pujjolo: Add MB usb-a port3 function. Add usb-a port3 setting to let funtion work fine. BUG=b:395763555 BRANCH=none TEST=Build and boot to pujjolo. Verify functions work. Change-Id: I132f34a5c341f64d829bb78be9d400a77889f291 Signed-off-by: Luca Lai Reviewed-on: https://review.coreboot.org/c/coreboot/+/87998 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Nick Vaccaro --- .../google/brya/variants/pujjolo/overridetree.cb | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/mainboard/google/brya/variants/pujjolo/overridetree.cb b/src/mainboard/google/brya/variants/pujjolo/overridetree.cb index 1b4ebb4cd3..d3c938252a 100644 --- a/src/mainboard/google/brya/variants/pujjolo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjolo/overridetree.cb @@ -38,6 +38,7 @@ chip soc/intel/alderlake register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB-A0 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB-A1 register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # WWAN register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # UF Camera @@ -534,6 +535,13 @@ chip soc/intel/alderlake register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port2 on end end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Port A0 (DB)"" + register "type" = "UPC_TYPE_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))" + device ref usb2_port3 on end + end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A1 (DB)"" register "type" = "UPC_TYPE_A"