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soc/amd/cezanne: Add config option to keep ACP running in ACPI S3 state

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Issue=ACP is not running in S3 because the XTAL FCH CLK is turned off.
ACP needs to be running in S3 for one of our customers who needs audio
playback to work in S3.

Fix=Introduce a config option to control this setting.

TEST=Tested this in ACPI S3 state,by connecting an external CODEC and
transmitting a known pattern to the ACP via the I2S TDM controller RX
lines and ensuring that the sound is output to the speaker connected
to the CODEC via the TDM TX line.

Change-Id: Ie9c0e96f87050b542a1ddf3f59d6b67064ac8faf
Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Anand Vaikar 2025-10-14 10:36:56 +05:30 • committed by Felix Held
commit 079c9c47aa
2 changed files with 12 additions and 1 deletions
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7
src/soc/amd/cezanne/Kconfig
View file

@ -93,6 +93,13 @@ config SOC_AMD_CEZANNE
if SOC_AMD_CEZANNE
config KEEP_ACP_RUNNING_IN_S3
bool
default n
help
Enables AMD Audio Co-Processor (ACP) to remain operational in ACPI
S3 (sleep) state for continued audio processing support.
config CHIPSET_DEVICETREE
string
default "soc/amd/cezanne/chipset.cb"

6
src/soc/amd/cezanne/fch.c
View file

@ -152,7 +152,11 @@ static void cgpll_clock_gate_init(void)
t = misc_read32(MISC_CLKGATEDCNTL);
t |= ALINKCLK_GATEOFFEN;
t |= BLINKCLK_GATEOFFEN;
t |= XTAL_PAD_S3_TURNOFF_EN;
if (!CONFIG(KEEP_ACP_RUNNING_IN_S3)) {
t |= XTAL_PAD_S3_TURNOFF_EN;
}
t |= XTAL_PAD_S5_TURNOFF_EN;
misc_write32(MISC_CLKGATEDCNTL, t);