mb/google/fatcat: config GPP_F23 as ISH gpio pin

The GPP_F23/ISH_GP_9A pin receives the lid open/close signal from
SMC_LID. This pin is not utilized in the AP firmware stack; however
the ISH firmware requires this signal for its tablet mode support.
Therefore, we configure this pin as an ISH GPIO.

BUG=b:370984186
TEST=Build and flash CB; run ISH main firmware; read this pin and
verified it returned the correct value.

fatcat-rev257 ~ # ectool --name=cros_ish gpioget lid_open
GPIO lid_open = 1

Change-Id: I19a4d6967acf96aefe2f38d628f898811d8a6e6d
Signed-off-by: Li Feng <li1.feng@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85464
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/fatcat/variants/fatcat/fw_config.c

@@ -459,6 +459,8 @@ static const struct pad_config ish_disable_pads[] = {
 	PAD_NC(GPP_D06, NONE),
 	/* GPP_E05:     NC */
 	PAD_NC(GPP_E05, NONE),
+	/* GPP_F23:     NC */
+	PAD_NC(GPP_F23, NONE),
 };
 
 static const struct pad_config ish_enable_pads[] = {
@@ -468,6 +470,8 @@ static const struct pad_config ish_enable_pads[] = {
 	PAD_CFG_NF(GPP_D06, NONE, DEEP, NF2),
 	/* GPP_E05:     ISH_GP_7_SNSR_HDR */
 	PAD_CFG_NF(GPP_E05, NONE, DEEP, NF4),
+	/* GPP_F23:     ISH_GP_9A */
+	PAD_CFG_NF(GPP_F23, NONE, DEEP, NF8),
 };
 
 void fw_config_configure_pre_mem_gpio(void)

src/mainboard/google/fatcat/variants/fatcat/gpio.c

@@ -293,8 +293,6 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_GPO(GPP_F20, 0, PLTRST),
 	/* GPP_F22:     THC1_SPI2_DSYNC */
 	PAD_CFG_NF(GPP_F22, NONE, DEEP, NF3),
-	/* GPP_F23:     SMC_LID */
-	PAD_CFG_GPI_SCI_LOW(GPP_F23, NONE, DEEP, LEVEL),
 
 	/* GPP_H00:     Not used */
 	PAD_NC(GPP_H00, NONE),