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doc/internals/devicetree_language: multiple segment groups supported

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coreboot supports more than just one PCI segment group by having more
than one domain in the devicetree, so update the PCI device description.

Change-Id: I9911b5e43732dd32638d540fcec6ca57b34d4fbc
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87206
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
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Felix Held 2025-04-07 23:22:34 +02:00 • committed by Maximilian Brune
commit 010cfa2842
1 changed files with 5 additions and 5 deletions
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10
Documentation/internals/devicetree_language.md
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@ -973,11 +973,11 @@ The pci device type defines a PCI or PCIe device on the PCI logical bus.
Resources for all PCI devices are assigned automatically, or must be
assigned in code if they're non-standard.
Currently, only a single segment is supported, but there is work to make
multiple different segments supported, each with a bus 0. Because the
bus is not specified, It's assumed that all pci devices that are not
behind a pci bridge device are on bus 0. If there are additional pci
busses in a chip, they can be added behind their bridge device.
Only a single segment group is supported per domain, but there can be multiple
domains to support the case of multiple segment groups, each with a bus 0.
Because the bus is not specified, It's assumed that all pci devices that are
not behind a pci bridge device are on bus 0. If there are additional pci busses
in a chip, they can be added behind their bridge device.
Examples: