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coreboot/src/soc/amd
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Jason Glenesk fff318fbce soc/amd/cezanne: Update FADT to support S0i3 
Set ACPI_FADT_LOW_PWR_IDLE_S0 flag in FADT.

BUG=b:178728116
TEST=Dump FACP and confirm Flags bits match expected.

Change-Id: I59ef762a18903135f9daa902ba8d1e40c451e96c
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52035
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-16 06:52:19 +00:00
..
cezanne soc/amd/cezanne: Update FADT to support S0i3 2021-04-16 06:52:19 +00:00
common soc/amd/common/block/gpio_banks: Use configure_scimap() 2021-04-15 23:41:06 +00:00
picasso soc/amd/piasso/fch: use common pm_set_power_failure_state functionality 2021-04-14 18:46:23 +00:00
stoneyridge soc/amd/stoneyridge: use common pm_set_power_failure_state functionality 2021-04-14 18:46:48 +00:00
Kconfig soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig 2020-11-19 14:29:14 +00:00