Felix Singer d49fafd531 mb/*: Remove SATA mode config for CNL based mainboards ... SATA_AHCI is already the default mode for CNL based mainboards. Therefore, remove its configuration from all related devicetrees. Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I814e191243224a4b021cd7d4c1b611316f1fd1a4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>		2020-12-08 21:16:51 +00:00
..
spd
variants	mb/*: Remove SATA mode config for CNL based mainboards	2020-12-08 21:16:51 +00:00
board_info.txt
bootblock.c
chromeos-hatch-16MiB.fmd
chromeos-hatch-32MiB.fmd
chromeos-puff-16MiB.fmd
chromeos-puff-32MiB.fmd
chromeos.c
dsdt.asl	soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD	2020-11-20 00:12:09 +00:00
ec.c
Kconfig	mb/google/hatch: select SOC_INTEL_CSE_LITE_SKU only if CHROMEOS	2020-11-25 09:17:21 +00:00
Kconfig.name	hatch: Create genesis variant	2020-11-09 10:18:07 +00:00
Makefile.inc
ramstage.c
romstage_spd_cbfs.c	mb/google/hatch,dedede,volteer: enable CHROMEOS_DRAM_PART_NUMBER_IN_CBI	2020-10-05 18:03:38 +00:00
romstage_spd_smbus.c	src: Add missing 'include <console/console.h>'	2020-11-17 09:01:14 +00:00
smihandler.c