coreboot/src/vendorcode/amd
Kyösti Mälkki fec6fa799c vendorcode/amd/agesa: Tidy up gcccar.inc
Change register preservations and fix comments about register
usage accordingly. Do this to avoid use of %mm0-2 registers inside
macros defined in gcccar.inc, as future implementation of
C_BOOTBLOCK_ENVIRONMENT will use them as well.

Adjust caller side accordingly.

Change-Id: Ic76fcc31ae714baf5259d17c41b62a3610aa947b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20579
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-07-15 16:10:19 +00:00
..
agesa vendorcode/amd/agesa: Tidy up gcccar.inc 2017-07-15 16:10:19 +00:00
cimx src: change coreboot to lowercase 2017-06-07 12:09:15 +02:00
include Rename __attribute__((packed)) --> __packed 2017-07-13 19:45:59 +00:00
pi vendorcode/amd/pi: Tidy up gcccar.inc 2017-07-15 16:08:59 +00:00
Kconfig soc/amd/stoneyridge: Add CPU files 2017-06-26 00:46:03 +00:00
Makefile.inc AMD Steppe Eagle: Add binary PI vendorcode files 2014-08-30 19:13:45 +02:00