f530e680d0
This configuration change enables the running of reference code for
bayleybay.
BUG=chrome-os-partner:22580
BRANCH=None
TEST=manual
. built and noted output of reference code debug information. The
eMMC device driver (not yet in the code base) is working reliably
after several reboots and power cycles, indicating that the PLL
initialization code is kicking in.
Change-Id: I426baa46a72a567f54a00dc00321ee4227531eff
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175077
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
34 lines
1,011 B
Text
34 lines
1,011 B
Text
CONFIG_COLLECT_TIMESTAMPS=y
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CONFIG_USE_BLOBS=y
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CONFIG_VENDOR_INTEL=y
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CONFIG_BOARD_INTEL_BAYLEYBAY=y
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CONFIG_HAVE_MRC=y
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CONFIG_MRC_FILE="/build/bayleybay/firmware/mrc.bin"
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CONFIG_HAVE_REFCODE_BLOB=y
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CONFIG_REFCODE_BLOB_FILE="/build/bayleybay/firmware/efi.elf"
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CONFIG_CBFS_SIZE=0x100000
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CONFIG_CONSOLE_CBMEM=y
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# CONFIG_CONSOLE_SERIAL is not set
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# CONFIG_PCI_ROM_RUN is not set
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# CONFIG_ON_DEVICE_ROM_RUN is not set
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# CONFIG_S3_VGA_ROM_RUN is not set
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CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
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CONFIG_FRAMEBUFFER_VESA_MODE_117=y
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CONFIG_FRAMEBUFFER_KEEP_VESA_MODE=y
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CONFIG_CPU_ADDR_BITS=36
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CONFIG_CACHE_ROM=y
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CONFIG_MARK_GRAPHICS_MEM_WRCOMB=y
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CONFIG_ELOG=y
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CONFIG_ELOG_GSMI=y
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CONFIG_ELOG_BOOT_COUNT=y
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CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144
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CONFIG_SPI_FLASH_SMM=y
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CONFIG_CMOS_POST=y
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CONFIG_CMOS_POST_OFFSET=0x70
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CONFIG_CMOS_POST_EXTRA=y
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CONFIG_RELOCATABLE_RAMSTAGE=y
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CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE=y
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CONFIG_VBOOT_VERIFY_FIRMWARE=y
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CONFIG_FLASHMAP_OFFSET=0x00610000
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# CONFIG_MULTIBOOT is not set
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CONFIG_PAYLOAD_NONE=y
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