coreboot/src
Furquan Shaikh fdc1b2e6b4 drivers/i2c: Pass in i2c_generic_config into i2c_generic_fill_ssdt
Remove any assumptions required for the drivers using i2c_generic to
have drivers_i2c_generic_config structure at the start of the driver
config. Instead pass in a pointer to drivers_i2c_generic_config from
the calling driver.

Change-Id: I51dc4cad1c1f246b51891abf7115a7120e87b098
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17857
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-12-15 17:26:07 +01:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch ACPI S3: Hide acpi_slp_type 2016-12-11 09:00:40 +01:00
commonlib buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
console Hook up libhwbase in ramstage 2016-11-29 23:45:40 +01:00
cpu ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP default 2016-12-11 09:12:48 +01:00
device buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
drivers drivers/i2c: Pass in i2c_generic_config into i2c_generic_fill_ssdt 2016-12-15 17:26:07 +01:00
ec ec/chromeec: Correct ACPI battery data fed into ToString() 2016-12-15 14:09:23 +01:00
include pc80: Move set_boot_successful() 2016-12-13 19:15:22 +01:00
lib lib/spd_bin: Check return code & remove dead code 2016-12-14 18:58:03 +01:00
mainboard google/eve: Configure I2C3 pins as GPIO inputs 2016-12-14 01:46:05 +01:00
northbridge nb/intel/gm45: Use lapic udelay in SMM 2016-12-13 17:56:04 +01:00
soc soc/intel/common: remove mrc cache assumptions 2016-12-15 07:51:35 +01:00
southbridge intel/i945: Use romstage_handoff for S3 2016-12-11 08:58:07 +01:00
superio sio/ite/it8783ef: Return (0) in ACPI _PSC methods 2016-12-13 22:49:24 +01:00
vboot commonlib/include: remove NEED_VB20_INTERNALS 2016-11-19 16:57:27 +01:00
vendorcode vendorcode/amd: drop dead code 2016-12-14 18:02:40 +01:00
Kconfig ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP default 2016-12-11 09:12:48 +01:00