coreboot/src
Sridhar Siricilla 7301cfac60 soc/intel/common: Order the different types of cores based on APIC IDs
Currently coreboot presents the BSP core first, then efficient cores and
Performance cores as indicated below:

```
/sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0-1
/sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4
/sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5
/sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6
/sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7
/sys/devices/system/cpu/cpu1/topology/thread_siblings_list:0-1
/sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2-3
/sys/devices/system/cpu/cpu3/topology/thread_siblings_list:2-3

```
Existing code presents mix of different cores to OS and causes CPU load
balancing and power/performance impact. So, the patch fixes this
disorder by ordering the Performance cores first, compute die efficient
cores next, and finally SOC efficient cores if they are present. This
is done to run the media applications in a power efficient manner,
please refer the ChromeOS patches for details:
https://chromium-review.googlesource.com/c/chromiumos/platform2/+/3963893

BUG=b:262886449
TEST=Verified the code on Rex system

After the fix:

```
/sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0-1
/sys/devices/system/cpu/cpu1/topology/thread_siblings_list:0-1
/sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2-3
/sys/devices/system/cpu/cpu3/topology/thread_siblings_list:2-3
/sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4
/sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5
/sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6
/sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7
```

Change-Id: I21487a5eb0439ea0cb5976787d1769ee94777469
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
2023-04-07 09:59:52 +00:00
..
acpi acpi: Add SRAT x2APIC table support 2023-03-03 17:08:27 +00:00
arch cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path 2023-04-06 15:13:28 +00:00
commonlib commonlib: Add new "DMU load completed" TS 2023-04-04 08:08:06 +00:00
console console: Deselect using ANSI escape characters when SimNow is used 2023-03-30 13:36:35 +00:00
cpu cpu/x86/topology: Add code to fill in topology on struct path 2023-04-06 15:27:23 +00:00
device cpu/x86/topology: Add code to fill in topology on struct path 2023-04-06 15:27:23 +00:00
drivers drivers/wwan/fm: Use RTD3 root port mutex for reset methods 2023-04-05 12:45:45 +00:00
ec ec/starlabs/merlin: Add support for the ITE mirror flag 2023-04-04 14:10:44 +00:00
include cpu/x86/topology: Add code to fill in topology on struct path 2023-04-06 15:27:23 +00:00
lib lib: set up specific purpose memory as LB_MEM_SOFT_RESERVED 2023-03-03 11:10:38 +00:00
mainboard mb/google/brya: Enable asynchronous End-Of-Post 2023-04-07 04:50:59 +00:00
northbridge nb/intel/gm45: Export EDID-reading routine as a function 2023-04-06 12:21:23 +00:00
sbom payloads/Yabits: Remove deprecated Yabits Payload 2023-02-17 01:21:43 +00:00
security security/vboot: Don't add RO pagetables to RW_A/B 2023-04-06 15:11:22 +00:00
soc soc/intel/common: Order the different types of cores based on APIC IDs 2023-04-07 09:59:52 +00:00
southbridge util/ifdtool/ifdtool.c: Clean up 2023-03-09 19:36:32 +00:00
superio treewide: Remove useless "_STA: Status" comment 2023-02-19 11:20:37 +00:00
vendorcode vc/amd/fsp/mendocino/FspmUpd: Update UDP structure for MDN-FSP 2023-03-29 13:20:10 +00:00
Kconfig option: Allow to use the EFI variable driver as option backend 2023-04-03 21:14:53 +00:00