coreboot/src/northbridge/intel
Kyösti Mälkki bd909ad437 nb/intel/e7505: Fix for RESOURCE_ALLOCATOR_V4
Memory region 0xa0000 to 0xc0000 was not reserved, the first
PCI memory resources might get assigned in this space.

FIXES: aopen/dxplplusu PCI EHCI 0:1d.7 memory resource.

Change-Id: Ia17025bde83b91d71ad719de6348197cf92e267e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52813
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-05-07 20:00:25 +00:00
..
common nb/intel/common: Replace _bar_clrsetbits_impl macro 2021-05-03 07:38:52 +00:00
e7505 nb/intel/e7505: Fix for RESOURCE_ALLOCATOR_V4 2021-05-07 20:00:25 +00:00
gm45 src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
haswell nb/intel: Don't select VBOOT_SEPARATE_VERSTAGE 2021-05-05 11:47:15 +00:00
i440bx spd.h: Move DIMMx macros to i440bx/raminit.h 2021-04-11 21:05:00 +00:00
i945 src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
ironlake src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
pineview src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
sandybridge src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
x4x src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00