coreboot/payloads/libpayload/arch
Stefan Reinauer 402cf4f530 libpayload: Add missing break statement in coreboot table parsing
Otherwise the code would try to parse GPIOs when encountering
a mainboard entry in the coreboot table. This never caused any
problems because the mainboard entry is parsed before the GPIO
entry.

Signed-off-by: Stefan Reinauer <reinauer@google.com>
BUG=chrome-os-partner:18637
TEST=no functional change
BRANCH=none

Change-Id: I1443bda8585a990a39115743d48304ec4b54bccb
Reviewed-on: https://gerrit.chromium.org/gerrit/59292
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
2013-06-19 15:22:42 -07:00
..
armv7 libpayload: Add missing break statement in coreboot table parsing 2013-06-19 15:22:42 -07:00
x86 libpayload: add x86 ROM variable MTRR support 2013-03-29 20:10:14 +01:00
Config.in libpayload: Drop PowerPC architecture 2013-06-13 15:50:38 -07:00