Vadim Bendebury f92edfe59c Arrange CBMEM table entries' IDs alphanumerically ... This is a no-op change just sorting the CBMEM entries' definitions for easy look up and comparison. BRANCH=storm BUG=none TEST=Booted a storm device, observed the expected CBMEM entries present in the console output. Change-Id: I26365285f20ecb256918277b60e178cd61dc8213 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f140fd8d85 Original-Change-Id: Ibcd4f184ef1bade10ad677384f61243da7e3c713 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225259 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9810 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>		2015-04-21 08:08:19 +02:00
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arch
console
cpu
device
drivers
ec
include	Arrange CBMEM table entries' IDs alphanumerically	2015-04-21 08:08:19 +02:00
lib
mainboard	urara: add config of SPI bus and correct selection of winbond flash	2015-04-21 08:08:12 +02:00
northbridge
soc	imgtec/pistachio: Add spi_crop_chunk()	2015-04-21 08:08:05 +02:00
southbridge	southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipset	2015-04-20 23:51:34 +02:00
superio
vendorcode
Kconfig