Nico Huber ef63c32b58 arch/riscv: Don't link stages.c into ramstage ... It's superseded by `ramstage.S`. Change-Id: I81648da2f2af3ad73b3b51471c6fa2daac0540b1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36610 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-11-05 15:24:15 +00:00
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arm	arch/arm: Pass cbmem_top to ramstage via calling argument	2019-11-03 11:19:04 +00:00
arm64	soc/nvidia/tegra210: Populate _cbmem_top_ptr	2019-11-04 11:40:12 +00:00
mips	arch/mips: Pass cbmem_top to ramstage via calling argument	2019-11-04 11:40:25 +00:00
ppc64	arch/ppc64: Pass cbmem_top to ramstage via calling argument	2019-11-04 11:39:25 +00:00
riscv	arch/riscv: Don't link stages.c into ramstage	2019-11-05 15:24:15 +00:00
x86	security/vboot: Removed vboot_prepare from vboot_locator	2019-11-05 15:03:44 +00:00