Martin Roth f7fd63066f tpm/acpi/tpm.asl: Only include tpm.asl if tpm is enabled ... If the TPM code isn't getting built in, the Kconfig symbol CONFIG_TPM_TIS_BASE_ADDRESS doesn't exist. This ends up creating an invalid operating region in the ACPI tables, causing a bluescreen in windows. This should fix this issue: https://ticket.coreboot.org/issues/35 "commit 85a255fb (acpi/tpm: Gracefully handle missing TPM module) breaks Windows" Change-Id: I32e0e09c1f61551a40f4842168f556d5e1940d28 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13890 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2016-03-05 22:51:03 +01:00
..
acpi
arch	arch/x86: Add common assembly code for stages that run in CAR	2016-03-05 20:11:35 +01:00
commonlib	lz4_wrapper: Use __asm__ rather than asm.	2016-03-05 00:56:53 +01:00
console	Kconfig: hide useless options on ARM.	2016-03-05 00:56:36 +01:00
cpu	arch/x86: document CAR symbols and expose them in symbols.h	2016-03-05 16:00:42 +01:00
device	Kconfig: hide useless options on ARM.	2016-03-05 00:56:36 +01:00
drivers	tpm/acpi/tpm.asl: Only include tpm.asl if tpm is enabled	2016-03-05 22:51:03 +01:00
ec	Hide EC_GOOGLE_CHROMEEC_SPI_BUS.	2016-03-05 00:57:22 +01:00
include	include/device/dram: Fix DDR3-1866	2016-03-05 15:35:14 +01:00
lib	lib/bootblock: provide SoC callback parity with mainboard	2016-02-26 02:16:14 +01:00
mainboard	amd/thatcher: Removed #include early_serial.c from romstage	2016-03-05 15:38:40 +01:00
northbridge	sandybridge/gma_lvds: support both Sandy&Ivy on one board	2016-03-05 09:39:41 +01:00
soc	Skylake: Support Intel Speed Shift Technology based on config	2016-03-01 20:57:45 +01:00
southbridge
superio	amd/thatcher: Removed #include early_serial.c from romstage	2016-03-05 15:38:40 +01:00
vendorcode	vboot: Set S3_RESUME flag for vboot context if necessary	2016-02-29 20:18:33 +01:00
Kconfig