Felix Held f7d86f21e1 soc/amd/stoneyridge/early_fch: use common lpc_early_init function ... The functionality of sb_enable_lpc is implemented in the common LPC support code as lpc_enable_controller. This gets called by the common lpc_early_init which also calls lpc_disable_decodes and lpc_set_spibase. The lpc_set_spibase call was already done in bootblock_fch_early_init, so the main change in code behavior is that now lpc_disable_decodes gets called during early FCH initialization. The lpc_enable_port80 and sb_lpc_decode calls after the lpc_early_init code will reenable some of the decodes. TEST=Successfully boots on google/liara, cbmem and dmesg logs look clean Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia58a6f609fa149a6c09ed99f08bdc4f05eb56f96 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66841 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2022-08-20 20:43:17 +00:00
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cezanne	soc/amd/common/acpi/cppc: add nominal and minimum frequencies	2022-08-17 16:24:16 +00:00
common	soc/amd/common/dmi: Add missing newline in printk	2022-08-20 04:33:35 +00:00
mendocino	soc/amd/mendocino: enable CPPC feature	2022-08-18 14:51:00 +00:00
picasso	soc/amd/cezanne,picasso,sabrina/smihandler: add comment about SMN access	2022-08-17 14:08:52 +00:00
stoneyridge	soc/amd/stoneyridge/early_fch: use common lpc_early_init function	2022-08-20 20:43:17 +00:00