EricKY Cheng f7a09278b6 soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles ... Expand extra 5 DPTC thermal related profiles for Dynamic Thermal Table Switching support. BRANCH=none BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com> Change-Id: Ie03de155325cbb340fce09848327ff7fa33ab1fd Reviewed-on: https://review.coreboot.org/c/coreboot/+/68469 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Van Patten <timvp@google.com>		2022-10-28 21:30:54 +00:00
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cezanne	soc/amd/cezanne/Kconfig: Enable APOB_HASH	2022-10-28 19:56:58 +00:00
common	soc/amd/cezanne: Factor out common GPP clk req code	2022-10-26 22:01:21 +00:00
glinda	soc/amd: Add framework for Glinda SoC	2022-10-25 18:18:37 +00:00
mendocino	soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles	2022-10-28 21:30:54 +00:00
morgana	soc/amd: Add amdfw.rom in coreboot.pre	2022-10-26 16:00:10 +00:00
picasso	soc/amd: Add amdfw.rom in coreboot.pre	2022-10-26 16:00:10 +00:00
stoneyridge	soc/amd/*/i2c.h: Make definition more accurate	2022-10-22 01:59:00 +00:00