coreboot/src
Meera Ravindranath f71572605a soc/intel/jasperlake: Enable VT-d and generate DMAR Table
Update UPDs required for the creation of DMAR table.

By default coreboot was not generating DMAR table for IOMMU which
was resulting in below error message in kernel:
DMAR: [Firmware Bug]: No DRHD structure found in DMAR table
DMAR: No DMAR devices found
These changes will publish DMAR table through ACPI and will not
result in the above error.

BUG=b:170261791
BRANCH=dedede
TEST=Build Dedede, boot to kernel and check dmesg if DMAR
     table exists.

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I97a9f2df185002a4e58eaa910f867acd0b97ec2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
2020-11-27 05:10:12 +00:00
..
acpi ACPI: Define acpi_get_preferred_pm_profile() 2020-11-19 22:58:41 +00:00
arch arch/x86/smbios: Update SMBIOS type 16 error correction type 2020-11-25 09:18:04 +00:00
commonlib cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
console console: Override uart base address 2020-11-09 07:46:10 +00:00
cpu cpu/intel/common: Fill cpu voltage in SMBIOS tables 2020-11-22 22:31:40 +00:00
device device: Drop unused HyperTransport code 2020-11-25 09:11:46 +00:00
drivers drivers/intel/fsp2_0: move the FSP FD PATH option down in menuconfig 2020-11-26 21:57:44 +00:00
ec ec/google/chromeec: Add more wrappers for regulator control 2020-11-18 06:13:12 +00:00
include arch/x86/smbios: Update SMBIOS type 16 error correction type 2020-11-25 09:18:04 +00:00
lib cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
mainboard mb/google/dedede: Create galtic variant 2020-11-25 21:29:46 +00:00
northbridge nb/amd: Deduplicate nb_common.h 2020-11-25 09:11:58 +00:00
security cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
soc soc/intel/jasperlake: Enable VT-d and generate DMAR Table 2020-11-27 05:10:12 +00:00
southbridge sb/intel/lynxpoint: Replace hard-coded IDs with defines 2020-11-24 18:37:58 +00:00
superio superio/smsc/sio1036: Support 16-bit IO port addressing 2020-11-18 13:12:11 +00:00
vendorcode vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1483_11 2020-11-26 18:10:47 +00:00
Kconfig soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00