coreboot/src/soc
Shelley Chen f6307ca9c2 soc/qualcomm/sc7280: Skip PCIe ops for eMMC SKUs
On Herobrine, we will determine if we have an NVMe device based on SKU
id.  Basically, if bit 0 is 2 (or Z), then we know that we have an
NVMe device and thus will need to go through PCIe initialization.
Otherwise, we know that we are booting an eMMC device.

BUG=b:254281839
BRANCH=None
TEST=build firmware image and boot and make sure we can boot up Tested
     on villager, which does not have NVMe and made sure that it boots
     still.  Check cbmem dump to make sure that device configuration
     entry is still low since it's not initializing PCIe devices:

     40:device configuration 730,203 (1,295)

Change-Id: I1fa0ad392ba6320fdbab54b3b5dc83ac28cd20ba
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69690
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-18 15:47:05 +00:00
..
amd soc/amd: Use ioapic helper functions 2022-11-17 23:31:59 +00:00
cavium soc: Add SPDX license headers to Makefiles 2022-10-31 03:27:13 +00:00
example/min86 soc: Add SPDX license headers to Makefiles 2022-10-31 03:27:13 +00:00
intel soc/intel/meteorlake: Add Meteor Lake MCH device ID 2022-11-18 15:45:56 +00:00
mediatek mb/google/geralt: Enable RTC for eventlog timestamps 2022-11-15 13:15:31 +00:00
nvidia soc/nvidia/tegra124: Fix building with clang 2022-11-10 15:33:32 +00:00
qualcomm soc/qualcomm/sc7280: Skip PCIe ops for eMMC SKUs 2022-11-18 15:47:05 +00:00
rockchip soc/rockchip/rk3288/clock.c: Remove trailing semicolon 2022-09-30 23:12:15 +00:00
samsung lib/coreboot_table: Simplify API to set up lb_serial 2022-11-04 19:17:13 +00:00
sifive/fu540 soc/sifive/ux00ddr.h: Remove set but unused variables 2022-11-10 15:32:33 +00:00
ti /: Remove unused <inttypes.h> 2022-11-08 14:43:00 +00:00
ucb/riscv soc: Add SPDX license headers to Makefiles 2022-10-31 03:27:13 +00:00