coreboot/src
Duncan Laurie f611fcfaca ec: superio: Report keyboard IRQ as wake capable
In order to wake from S0ix the kernel needs to know that the
keyboard interrupt is wake capable.  Using IRQNoFlags does not
allow the wake capability to be reported.

For normal S3 this does not matter as the EC is the one handling
the keyboard wake event.  For S0ix the EC does not need to be
involved in this particular wake event.

BUG=chrome-os-partner:43079
BRANCH=none
TEST=echo freeze > /sys/power/state and wake from keyboard

Change-Id: I7175d2ea98f8a671765897de295df7b933151fc4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 645f1cd96c35f42aa7c40ff473b15feb619b0373
Original-Change-Id: Ia89c30c51be9db7b814b81261463d938885325fd
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/301441
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11712
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-09-28 09:32:50 +00:00
..
acpi acpi/sata: add generic sata ssdt port generator 2015-06-07 01:24:47 +02:00
arch RISCV: modify arch_prog_run to handle payloads correctly. 2015-09-23 17:02:18 +00:00
commonlib commonlib: add endian related accessor functions 2015-09-22 21:21:56 +00:00
console consoles: remove unused infrastructure 2015-05-26 19:02:54 +02:00
cpu coreboot: move TS_END_ROMSTAGE to one spot 2015-09-24 16:12:44 +00:00
device symbols: add '_' to pci_drivers and cpu_drivers symbols 2015-09-05 15:36:23 +00:00
drivers coreboot: introduce commonlib 2015-09-22 21:21:34 +00:00
ec ec: superio: Report keyboard IRQ as wake capable 2015-09-28 09:32:50 +00:00
include chromeos: vboot and chromeos dependency removal for sw write protect state 2015-09-23 19:35:31 +00:00
lib coreboot: move TS_END_ROMSTAGE to one spot 2015-09-24 16:12:44 +00:00
mainboard coreboot: move TS_END_ROMSTAGE to one spot 2015-09-24 16:12:44 +00:00
northbridge coreboot: move TS_END_ROMSTAGE to one spot 2015-09-24 16:12:44 +00:00
soc coreboot: move TS_END_ROMSTAGE to one spot 2015-09-24 16:12:44 +00:00
southbridge coreboot: move TS_END_ROMSTAGE to one spot 2015-09-24 16:12:44 +00:00
superio superio/smsc: Add support for SMSC DME1737 2015-07-13 17:11:00 +02:00
vendorcode chromeos: vboot and chromeos dependency removal for sw write protect state 2015-09-23 19:35:31 +00:00
Kconfig Kconfig: Remove EXPERT mode 2015-08-30 07:50:47 +00:00