coreboot/src
Julius Werner f5e5cf0644 gru: Change UART _Static_assert() condition to preprocessor #if
_Static_assert() gets evaluated even when the code path it's in is
unreachable (e.g. inside an if (0) block). Unfortunately, Kconfigs that
depend on a disabled Kconfig are always 0, meaning that
CONFIG_CONSOLE_SERIAL_UART_ADDRESS on Gru cannot evaluate to UART2 when
CONFIG_CONSOLE_SERIAL (which it depends on) is disabled. Switch the
condition it is wrapped in to a preprocessor #if so that the
_Static_assert() is not evaluated when building without serial support.

BRANCH=None
BUG=None
TEST=Built and booted Kevin without serial

Change-Id: I33d51d4ef09b218c14173d39a12795f0cef6bb40
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/361581
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2016-07-20 20:06:06 -07:00
..
acpi UPSTREAM: arch/x86: provide common Intel ACPI hardware definitions 2016-07-15 08:39:52 -07:00
arch UPSTREAM: arch/riscv: Enable unaligned load handling 2016-07-19 18:33:29 -07:00
commonlib UPSTREAM: drivers/intel/fsp2_0: load and relocate FSPS in cbmem 2016-07-19 16:31:34 -07:00
console UPSTREAM: console/post: be explicit about conditional cmos_post_log() compiling 2016-05-26 03:21:57 -07:00
cpu UPSTREAM: AMD binaryPI: Use common romstage ram stack 2016-07-18 03:21:31 -07:00
device UPSTREAM: device: i2c: Add support for I2C bus operations 2016-06-10 00:17:46 -07:00
drivers UPSTREAM: drivers/intel/fsp2_0: Split reset handling logic 2016-07-19 18:33:31 -07:00
ec UPSTREAM: ec/google/chromeec: provide common SMI handler helpers 2016-07-15 16:50:24 -07:00
include UPSTREAM: soc/intel/common: Add reset_prepare() for common reset 2016-07-19 18:33:24 -07:00
lib UPSTREAM: lib: provide memrange library in romstage 2016-07-19 16:31:15 -07:00
mainboard gru: Change UART _Static_assert() condition to preprocessor #if 2016-07-20 20:06:06 -07:00
northbridge UPSTREAM: nb/intel/x4x: Fix CAS latency detection 2016-07-19 16:31:08 -07:00
soc google/gale: Fix board ID and GPIO config. 2016-07-19 18:33:54 -07:00
southbridge UPSTREAM: southbridge/intel/fsp_bd82x6x: use common Intel ACPI hardware definitions 2016-07-15 08:40:29 -07:00
superio UPSTREAM: sio/winbond/w83667hg-a: Add pinmux defines for UART B 2016-05-31 12:07:04 -07:00
vendorcode UPSTREAM: soc/intel/quark: Pass in the memory initialization parameters 2016-07-09 01:40:13 -07:00
Kconfig UPSTREAM: Romstage spinlocks require EARLY_CBMEM_INIT 2016-07-11 21:27:20 -07:00