Tim Van Patten f5ae1dd1be amd/mendocino/root_complex: Restrict DPTC to 15W boards ... Restrict DPTC to 15W boards, since we only have 15W values defined in the devicetree. This will revert the 6W boards back to their default values, rather than (incorrectly) configuring them with 15W values. BUG=b:253301653 TEST=Verify DPTC values are set for 15W boards TEST=Verify DPTC values are set not set for 6W boards Change-Id: I94f3974fce6358e3cbb0c30c1af33eb7ecb29ad7 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74127 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2023-04-06 18:00:42 +00:00
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cezanne	soc/amd/*/Makefile: use all_x86 target	2023-04-04 19:18:29 +00:00
common	soc/amd/*/Makefile: use all_x86 target	2023-04-04 19:18:29 +00:00
glinda	soc/amd/*/Makefile: use all_x86 target	2023-04-04 19:18:29 +00:00
mendocino	amd/mendocino/root_complex: Restrict DPTC to 15W boards	2023-04-06 18:00:42 +00:00
phoenix	soc/amd/*/Makefile: use all_x86 target	2023-04-04 19:18:29 +00:00
picasso	soc/amd/*/Makefile: use all_x86 target	2023-04-04 19:18:29 +00:00
stoneyridge	soc/amd/stoneyridge: factor out P-state utils to link in all stages	2023-04-01 15:06:08 +00:00