coreboot/northbridge
Ronald G. Minnich 718dab6ba5 This is a cumulative set of fixes for LX800 boards. These are all tested on ALIX 1C and DBE62.
This includes:
 - the working power button patch.
 - onchipuart2 for very early startup -- this will be replaced with a better mechanism soon.
 - dts mod for powerbutton on cs5536
 - dbe62 dts fix for COM1 setup
 - ram check call in dbe62 initram.c
 - Carl-Daniel's fix to detect incorrect access to spd variables.
 - more debug prints in geodelx northbridge support code.

 This is cumulative since we're lagging on acks a bit and it's hard to keep this
 stuff all seperated out since it involves a common set of files. I'd like to get
 it acked and in tree today if possible. It's a very small set of lines changed so please
 forgive me for the cumulative nature.

 Thanks

 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>


Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>






git-svn-id: svn://coreboot.org/repository/coreboot-v3@636 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-03-06 23:33:59 +00:00
..
amd/geodelx This is a cumulative set of fixes for LX800 boards. These are all tested on ALIX 1C and DBE62. 2008-03-06 23:33:59 +00:00
intel/i440bxemulation A lot of the v3 header files require other header files to be #included 2008-02-19 00:34:32 +00:00