coreboot/src
Martin Roth f52ea7fe00 Revert "google/scarlet: Enable innolux,p079zca MIPI panel"
This reverts commit 39b633b26d.
Commit was accidentally pushed too early and broke the tree.
I'll repush the original.

Change-Id: Iaca6d43cc8fc0959565d5d151a330c0c7ba38309
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-05-05 23:17:26 +02:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch arch/x86: Share storage data structures between early stages 2017-05-01 17:37:59 +02:00
commonlib commonlib: Add ID for STORAGE_DATA 2017-04-28 19:56:11 +02:00
console console: rework log level to not be reliant on ROMSTAGE_CONST 2017-04-25 18:13:56 +02:00
cpu nb/amd/amdk8: Link reset_test.c 2017-04-28 17:17:40 +02:00
device lib/edid.c: Allow use of when not NGI 2017-05-03 16:16:32 +02:00
drivers drivers/{aspeed,xgi_z9s}/Kconfig: Don't override NATIVE_VGA_USE_EDID 2017-05-03 16:19:18 +02:00
ec ec/roda/it8518: Do EC write manually with long timeout 2017-04-08 13:17:56 +02:00
include lib/edid: Save the display ASCII string 2017-05-03 16:18:15 +02:00
lib lib/edid: Save the display ASCII string 2017-05-03 16:18:15 +02:00
mainboard Revert "google/scarlet: Enable innolux,p079zca MIPI panel" 2017-05-05 23:17:26 +02:00
northbridge nb/intel/x4x/raminit: Change reset type on incomplete raminit reset 2017-05-04 09:31:26 +02:00
soc soc/intel/skylake: Enable SATA ports 2017-05-05 22:42:19 +02:00
southbridge amd/pi/hudson: Add config option for ACPI base 2017-05-02 05:17:16 +02:00
superio superio/fintek: Add support for Fintek F71808A 2017-03-27 19:19:56 +02:00
vboot vboot: Separate board name and version number in FWID with a dot 2017-04-29 01:44:10 +02:00
vendorcode Kconfig: provide MAINBOARD_HAS_TPM_CR50 option 2017-04-24 22:02:55 +02:00
Kconfig include: Add xmalloc, xzmalloc and dma routines 2017-04-25 00:52:03 +02:00