coreboot/src/soc
Aaron Durbin f3f409bf55 baytrail: correct MMC pci location
The original documentation was incorrect. Fix the pci
device for the MMC port to reflect reality.

MMC is at 00:17.0 with a device id of 0x0f50.

BUG=None
BRANCH=None
TEST=Built.

Change-Id: Ic18665b7dda5f386e72d1a5255e4e57d5b631eb0
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172772
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4884
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-02-16 20:37:22 +01:00
..
intel baytrail: correct MMC pci location 2014-02-16 20:37:22 +01:00
Kconfig baytrail: add initial support 2014-01-31 16:36:59 +01:00
Makefile.inc baytrail: add initial support 2014-01-31 16:36:59 +01:00