Nick Vaccaro 6745056a06 util: Add DDR4 generic SPD for H5ANAG6NCJR-XNC ... Add SPD support for DDR4 memory part H5ANAG6NCJR-XNC. BUG=b:161772961 TEST=none Change-Id: I71e4de9a28f78bbf8c7de1fcafa3596276a5f2f9 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2020-10-12 08:38:27 +00:00
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amd	soc/amd/picasso: Remove xhci0_force_gen1 from soc config	2020-10-08 01:30:36 +00:00
cavium	soc/cavium: Drop unneeded empty lines	2020-09-22 17:14:49 +00:00
intel	util: Add DDR4 generic SPD for H5ANAG6NCJR-XNC	2020-10-12 08:38:27 +00:00
mediatek	soc/mediatek: Add function to measure clock frequency of MT8192	2020-10-09 15:33:00 +00:00
nvidia	soc/nvidia: Drop unneeded empty lines	2020-09-22 17:14:59 +00:00
qualcomm	trogdor: Modify DDR training to use mrc_cache	2020-10-09 19:45:40 +00:00
rockchip	soc/rockchip: Drop unneeded empty lines	2020-09-21 16:18:49 +00:00
samsung	soc/samsung: Drop unneeded empty lines	2020-09-21 16:18:07 +00:00
sifive	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ti	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00