db7f6fb752
Many peripheral drivers across different SoCs regularly face the same task of piping a transfer buffer into (or reading it out of) a 32-bit FIFO register. Sometimes it's just one register, sometimes a whole array of registers. Sometimes you actually transfer 4 bytes per register read/write, sometimes only 2 (or even 1). Sometimes writes need to be prefixed with one or two command bytes which makes the actual payload buffer "misaligned" in relation to the FIFO and requires a bunch of tricky bit packing logic to get right. Most of the times transfer lengths are not guaranteed to be divisible by 4, which also requires a bunch of logic to treat the potential unaligned end of the transfer correctly. We have a dozen different implementations of this same pattern across coreboot. This patch introduces a new family of helper functions that aims to solve all these use cases once and for all (*fingers crossed*). Change-Id: Ia71f66c1cee530afa4c77c46a838b4de646ffcfb Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34850 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
60 lines
1.6 KiB
Makefile
60 lines
1.6 KiB
Makefile
ramstage-y += device.c
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ramstage-y += root_device.c
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ramstage-y += cpu_device.c
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ramstage-y += device_util.c
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ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c
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ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c
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ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += pnp_device.c
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ramstage-y += smbus_ops.c
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ifeq ($(CONFIG_AZALIA_PLUGIN_SUPPORT),y)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
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endif
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bootblock-y += device_const.c
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postcar-y += device_const.c
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smm-y += device_const.c
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verstage-y += device_const.c
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romstage-y += device_const.c
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ramstage-y += device_const.c
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ifeq ($(CONFIG_PCI),y)
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bootblock-y += pci_early.c
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verstage-y += pci_early.c
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romstage-y += pci_early.c
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postcar-y += pci_early.c
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ramstage-y += pci_class.c
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ramstage-y += pci_device.c
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ramstage-y += pci_rom.c
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bootblock-y += pci_ops.c
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verstage-y += pci_ops.c
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romstage-y += pci_ops.c
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postcar-y += pci_ops.c
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ramstage-y += pci_ops.c
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smm-y += pci_ops.c
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ramstage-$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) += hypertransport.c
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ramstage-$(CONFIG_PCIX_PLUGIN_SUPPORT) += pcix_device.c
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ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c
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ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c
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endif
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subdirs-y += oprom dram
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bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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bootblock-y += i2c.c
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verstage-y += i2c.c
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romstage-y += i2c.c
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ramstage-y += i2c.c
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ramstage-y += i2c_bus.c
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bootblock-y += mmio.c
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verstage-y += mmio.c
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romstage-y += mmio.c
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ramstage-y += mmio.c
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