coreboot/src
Angel Pons 71892b4bec nb/intel/sandybridge: Use MCHBAR bitwise ops
Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 does not change.

Change-Id: If16d8c4aef3dfd1dbeaf48d6855dd4c0ef328168
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42151
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-06-09 00:33:53 +00:00
..
acpi acpi: Rename motherboard_fill_fadt() to mainboard_fill_fadt() 2020-06-07 21:53:33 +00:00
arch arch/x86/postcar_loader: utilize var_mtrr_context API 2020-06-02 16:10:05 +00:00
commonlib commonlib: Add CBFS_TYPE_BOOTBLOCK 2020-06-02 07:26:44 +00:00
console treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
cpu src: Remove unused 'include <cpu/x86/mtrr.h>' 2020-06-06 09:43:11 +00:00
device device: Add a disabling PCIe device bus master function 2020-06-08 06:39:01 +00:00
drivers spi: Remove non_volatile flag from block protection interface 2020-06-08 07:51:18 +00:00
ec ec/google/chromeec: Append connector device to *-switch properties 2020-06-08 06:41:11 +00:00
include pci_ops.h: Turn and/or ops into update wrappers 2020-06-09 00:26:12 +00:00
lib fw_config: Add firmware configuration interface 2020-06-02 16:40:04 +00:00
mainboard mb/google/dedede: Default spk_en gpio to low 2020-06-08 21:41:00 +00:00
northbridge nb/intel/sandybridge: Use MCHBAR bitwise ops 2020-06-09 00:33:53 +00:00
security src: Remove unused 'include <fmap.h>' 2020-06-02 07:42:40 +00:00
soc soc/amd/picasso: solve MTRRs only from 4GiB and below 2020-06-08 19:08:11 +00:00
southbridge sb/intel/bd82x6x: Align some ME functions 2020-06-07 21:48:22 +00:00
superio superio/nuvoton/nct6776: Reflow pnp_dev_info array 2020-06-08 12:05:02 +00:00
vendorcode vendorcode/amd: Remove duplicate assignment 2020-06-07 21:56:03 +00:00
Kconfig fw_config: Add firmware configuration interface 2020-06-02 16:40:04 +00:00