Varshit B Pandya f09b39bf88 soc/intel/alderlake: Correct Bus and Device of Touch Host Controller ... Correct Bus and Device for THC0 and THC1 Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com> Change-Id: I41858ea156c8258ea0e7be9e2f67fb0e24144c80 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>		2021-07-05 05:27:26 +00:00
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amd	soc/amd/common/espi: Fix debug message log level	2021-07-02 23:13:03 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
intel	soc/intel/alderlake: Correct Bus and Device of Touch Host Controller	2021-07-05 05:27:26 +00:00
mediatek	soc/mediatek/mt8195: Utilize the retry macro	2021-06-26 10:09:20 +00:00
nvidia	cbfs: Replace more instances of cbfs_boot_locate() with newer APIs	2021-03-17 08:10:20 +00:00
qualcomm	sc7280: Add target specific GPIO pin definitions	2021-06-11 07:36:16 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	commonlib/region: Turn addrspace_32bit into a more official API	2021-04-21 02:06:26 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/mmc.c: Fix memset length argument	2021-04-04 09:58:26 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00