coreboot/src
Patrick Georgi 01368ed5ed Kconfig: rename CONSOLE_SERIAL_UART to DRIVERS_UART
Some upstreaming patches missed that, so follow up.

Change-Id: I28665c97ac777d8b0b0f909e64b32681ed2b98f7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9771
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-04-20 18:43:36 +02:00
..
arch riscv: use new-style CBFS header lookup 2015-04-18 09:21:08 +02:00
console Add console wrapper for UART driver 2015-04-14 21:25:34 +02:00
cpu uart: pass register width in the coreboot table 2015-04-17 09:53:39 +02:00
device rk3288: Add software I2C support 2015-04-17 09:59:19 +02:00
drivers flash: use two bytes of device ID to identify stmicro chips 2015-04-17 10:10:52 +02:00
ec chromeec: Fix printf formatting warning 2015-04-14 09:01:03 +02:00
include chromeos: vboot2: Add TPM PCR extension support 2015-04-20 17:06:28 +02:00
lib chromeos: vboot2: Add TPM PCR extension support 2015-04-20 17:06:28 +02:00
mainboard Kconfig: rename CONSOLE_SERIAL_UART to DRIVERS_UART 2015-04-20 18:43:36 +02:00
northbridge northbridge/amd/agesa/familyXY: Make NULL device op explicit 2015-04-09 19:34:22 +02:00
soc Kconfig: rename CONSOLE_SERIAL_UART to DRIVERS_UART 2015-04-20 18:43:36 +02:00
southbridge southbrige/intel/bd82x6x: XHCI replace magic values 2015-04-19 21:26:14 +02:00
superio kconfig: drop intermittend forwarder files 2015-04-07 17:40:28 +02:00
vendorcode chromeos: vboot2: Add TPM PCR extension support 2015-04-20 17:06:28 +02:00
Kconfig rk3288: Disable ramstage compression by default 2015-04-20 10:19:56 +02:00