coreboot/payloads/libpayload/arch
Vadim Bendebury 0afae893d5 libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication
It turns out that CB_TAG_ACPI_GNVS is handled in both x86 specific and
common coreboot table parsing code. The MRC cache case used only by
x86 is handled in the common code.

This patch restores sanity and moves processing to where it belongs.

BRANCH=none
BUG=none
TEST=verified that arm and x86 targets build.

Change-Id: I2c114a8469455002c51593cb8be80585925969a7
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/225457
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2014-10-25 01:18:48 +00:00
..
arm arm: Dump additional fault registers in abort handlers 2014-10-18 01:37:16 +00:00
arm64 arm64: Move console_init after post_sysinfo_mmu_setup call 2014-10-10 11:39:45 +00:00
x86 libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication 2014-10-25 01:18:48 +00:00
Config.in libpayload: Add support for arm64 in libpayload 2014-06-07 01:28:57 +00:00