coreboot/src
Daisuke Nojiri efddcfbb52 vboot2: separate verstage from bootblock
With CONFIG_RETURN_FROM_VERSTAGE false, the verstage loads the romstage over
the bootblock, then exits to the romstage. this is necessary for some SOC
(e.g. tegra124) which runs the bootblock on a different architecture.

With CONFIG_RETURN_FROM_VERSTAGE true, the verstage returns to the bootblock.
Then, the bootblock loads the romstage over the verstage and exits to the
romstage. this is probably necessary for some SOC (e.g. rockchip) which does not
have SRAM big enough to fit the verstage and the romstage at the same time.

BUG=none
TEST=Built Blaze with USE=+/-vboot2. Ran faft on Blaze.
BRANCH=none
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: I673945c5e21afc800d523fbb25d49fdc83693544
Original-Reviewed-on: https://chromium-review.googlesource.com/212365
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Note: This purposefully is probably broken in vendorcode/google/chromeos
as I'm just trying to set a base for dropping more patches in. The vboot
paths will have to change from how they are currently constructed.

(cherry picked from commit 4fa1739511)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I9117434ce99695f9b7021a06196d864f180df5c9
Reviewed-on: http://review.coreboot.org/8881
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24 14:48:04 +01:00
..
arch vboot2: separate verstage from bootblock 2015-03-24 14:48:04 +01:00
console console: Allow bootblock console on MIPS 2015-03-23 15:35:06 +01:00
cpu imgtec/danube: Add support for ImgTec Danube SoC 2015-03-21 16:57:08 +01:00
device PCIe: Revise L1 Sub-State support 2015-03-23 13:11:18 +01:00
drivers vboot2: read secdata and nvdata 2015-03-23 19:51:47 +01:00
ec chromeec: use stopwatch API 2015-03-21 17:00:26 +01:00
include vboot2: read secdata and nvdata 2015-03-23 19:51:47 +01:00
lib vboot2: translate shared data to hand off to depthcharge 2015-03-23 19:53:09 +01:00
mainboard vboot2: separate verstage from bootblock 2015-03-24 14:48:04 +01:00
northbridge cpu/amd/model_10xxx: Add support for early cbmem 2015-03-19 08:28:43 +01:00
soc vboot2: separate verstage from bootblock 2015-03-24 14:48:04 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode vboot2: separate verstage from bootblock 2015-03-24 14:48:04 +01:00
Kconfig Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00