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Aaron Durbin eed7631a9d falco: drive WLAN_DISABLE_L low in S3 and S5
When the board is in S3 and S5 the WLAN_DISABLE_L signal
can leak power into the WLAN power well since the GPIO
controlling WLAN_DISABLE_L is in the suspend well. Therefore,
drive WLAN_DISABLE_L low to avoid the power leak.

BUG=chrome-os-partner:20793
BRANCH=None
TEST=Manual. Checked the WLAN_DISABLE_L signal on wlan connector in both S3 and
     S5. It is driven to ground. WLAN continues to work in S0.

Change-Id: I1a0df80dd47fdbd535aca7a9d49253794c480606
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61421
2013-07-10 12:10:00 -07:00
3rdparty@ba8caa30bd Update 3rdparty mark to latest repository 2013-03-15 19:09:08 +01:00
configs parrot32,parrot64: Initial motherboard commit 2013-07-09 10:44:11 -07:00
documentation sconfig: rename lapic_cluster -> cpu_cluster 2013-02-14 07:07:20 +01:00
payloads libpayload: Get rid of a compiler warning. 2013-07-08 18:03:33 -07:00
src falco: drive WLAN_DISABLE_L low in S3 and S5 2013-07-10 12:10:00 -07:00
util cbmem: Implement ARM support 2013-06-20 13:54:35 -07:00
.gitignore add a few entries to .gitignore 2013-01-10 22:51:20 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile build system: Retire REQUIRES_BLOB 2013-02-19 11:00:41 +01:00
Makefile.inc rmodule: add rmodules class and new type 2013-03-18 20:46:40 +01:00
PRESUBMIT.cfg chromeos: Add PRESUBMIT.cfg 2013-05-01 14:31:10 -07:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.