coreboot/src/soc
Martin Roth ed029a9c6c soc/amd/mendocino: Remove 2 unused PCIe functions
Mendocino only has 4 PCIe lanes exposed, so there's no need for 6
PCIe functions to control them. These functions just show up as
leftover devicetree devices.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I5b801d82f085d77706b8053a8fc9728101f155e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73853
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-03-21 19:44:38 +00:00
..
amd soc/amd/mendocino: Remove 2 unused PCIe functions 2023-03-21 19:44:38 +00:00
cavium treewide: Remove duplicated include <device/pci.h> 2023-02-01 03:03:34 +00:00
example/min86
intel soc/intel/common/block/acpi: Support more than 255 cores 2023-03-21 12:59:13 +00:00
mediatek soc/mediatek/mt8186: Shut down PMIC on power key long press 2023-03-15 10:30:17 +00:00
nvidia treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
qualcomm qualcomm/common: Pass FMAX_LIMIT flag for Lazor board to QcLib 2023-03-17 00:34:08 +00:00
rockchip
samsung treewide: Fix old-style declarations 2023-01-17 04:23:49 +00:00
sifive/fu540
ti
ucb/riscv