Ryan Chuang eb94a4a6de vc/mediatek/mt8195: Optimize DRAM init time by limiting frequency count ... Support the config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT to limit DRAM frequency counts to reduce DRAM initialization time by about 100ms. BUG=b:195274787 Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: Ibcb9a50c24f428358ef682b64946d4c91ebd81d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com>		2021-08-09 01:53:29 +00:00
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amd	soc/amd/cezanne: enable crypto in psp_verstage	2021-07-21 16:53:17 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	src/vendorcode/eltan: Don't reference CONFIG_CBFS_SIZE	2021-07-28 08:19:30 +00:00
google	timestamp,vc/google/chromeos/cr50: Add timestamp for enable update	2021-07-05 10:50:06 +00:00
intel	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2265_01	2021-07-30 17:32:49 +00:00
mediatek	vc/mediatek/mt8195: Optimize DRAM init time by limiting frequency count	2021-08-09 01:53:29 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00