coreboot/src
Ivy Jian eb90521edd mb/google/mancomb: enable DDI0-DP port
Configure DDI-0 connector type to DP.

BUG=b:187856682
TEST=Build and boot into OS

Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Change-Id: Ic8af14509b0d246c5c2da6e1a48991384471e69f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-05-16 16:35:30 +00:00
..
acpi src/acpi: Add initial support for HMAT 2021-05-14 08:56:59 +00:00
arch cbfs: Increase mcache size defaults 2021-05-14 00:35:46 +00:00
commonlib commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
console src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
cpu cpu/amd/pi/00730F01/model_16_init.c: create correct MTRR solution 2021-05-13 17:18:42 +00:00
device device/device.c: Print bus numbers in decimal 2021-05-11 12:52:30 +00:00
drivers drivers/i2c/cs42l42: Make HS_BIAS_SENSE_EN optional 2021-05-12 08:00:12 +00:00
ec src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
include soc/intel/alderlake: Update CPU and IGD Device IDs 2021-05-14 09:03:01 +00:00
lib cbfs: Increase mcache size defaults 2021-05-14 00:35:46 +00:00
mainboard mb/google/mancomb: enable DDI0-DP port 2021-05-16 16:35:30 +00:00
northbridge nb/amd/pi/00730F01: enable RESOURCE_ALLOCATOR_V4 2021-05-13 17:18:28 +00:00
security cbfs: Increase mcache size defaults 2021-05-14 00:35:46 +00:00
soc soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC 2021-05-14 23:00:01 +00:00
southbridge sb/intel/common/pmclib: Use pmbase functions 2021-05-07 06:07:06 +00:00
superio src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
vendorcode vendor/mediatek: Add MT8195 dram initialization code 2021-05-14 04:00:38 +00:00
Kconfig src/drivers/ipmi: Add DEBUG_IPMI option 2021-04-18 20:37:10 +00:00