Enable PCIe Advanced Error Reporting for PCIe root port 0. BUG=b:64798078 TEST="lspci" shows that AER is enabled in the capabilities list. Change-Id: I8a818a9539b8d4f103d551ffd59713c9bbbc13ce Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/21425 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> |
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| .. | ||
| acpi | ||
| arch | ||
| commonlib | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| soc | ||
| southbridge | ||
| superio | ||
| vboot | ||
| vendorcode | ||
| Kconfig | ||