coreboot/src/include/cpu
Duncan Laurie 0edc22490a smi: Update mainboard_smi_gpi() to have 32bit argument
With the LynxPoint chipset there are more than 16
possible GPIOs that can trigger an SMI so we need
a mainboard handler that can support this.

There are only a handful of users of this function
so just change them all to use the new prototype.

Change-Id: I3d96da0397d6584f713fcf6003054b25c1c92939
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49530
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4145
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-11-24 07:40:22 +01:00
..
amd AMD Kabini: Add CPU AGESA wrapper for new AMD processor family 2013-08-05 18:21:29 +02:00
intel Drop prototype guarding for romcc 2013-05-10 00:06:46 +02:00
x86 smi: Update mainboard_smi_gpi() to have 32bit argument 2013-11-24 07:40:22 +01:00
cpu.h x86: use boot state callbacks to disable rom cache 2013-05-01 07:12:17 +02:00