coreboot/src/vendorcode
Srinidhi N Kaushik 6d126acfac vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header files for Tiger Lake
Update FSP header files for Tiger Lake platform version 2457.

Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I47574844a8b5fd888e8e75ed2f60f6df465b33ee
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
2020-01-25 10:42:23 +00:00
..
amd vc/amd/agesa: Fix out of bounds read 2020-01-13 11:22:40 +00:00
cavium dram-spd: Remove free() 2019-12-27 16:08:40 +00:00
eltan Drop ROMCC code and header guards 2019-12-19 03:25:05 +00:00
google printf: Automatically prefix %p with 0x 2019-12-11 11:38:59 +00:00
intel vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header files for Tiger Lake 2020-01-25 10:42:23 +00:00
siemens vendorcode/siemens/hwilib: Fix current file string usage 2019-11-29 09:03:41 +00:00
Makefile.inc vendorcode/eltan: Add vendor code for measured and verified boot 2019-06-04 10:41:53 +00:00