7524400242
The SiFive UART on the HiFive Unleashed uses the tlclk as input clock which runs at coreclk / 2. The input frequency is configured in the board code depending on the current stage. (bootblock + romstage run at 33.33Mhz, ramstage at 1Ghz) Change-Id: Iaf66723dba3d308f809fde5b05dfc3e43f43bd42 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> |
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| .. | ||
| Kconfig | ||
| Makefile.inc | ||
| oxpcie.c | ||
| oxpcie_early.c | ||
| pl011.c | ||
| pl011.h | ||
| sifive.c | ||
| uart8250io.c | ||
| uart8250mem.c | ||
| uart8250reg.h | ||
| util.c | ||