coreboot/src/soc
Aaron Durbin e80a1b1690 soc/amd/picasso: remove save/restore MTRRs around FSP-M
AGESA FSP-M implementation is now not updating MTRRs out from
under the caller. As such, remove the save/restore of MTRRs
from the FSP-M call.

BUG=b:155426691

Change-Id: I14f3b18dd373ce17957ef3857920e1c4e2901bbe
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-06-08 19:08:03 +00:00
..
amd soc/amd/picasso: remove save/restore MTRRs around FSP-M 2020-06-08 19:08:03 +00:00
cavium src: Remove redundant includes 2020-06-02 07:42:32 +00:00
intel spd/lp4x: Set manufacturer part name to blank (0x20) 2020-06-08 06:42:19 +00:00
mediatek src: Remove redundant includes 2020-06-02 07:42:32 +00:00
nvidia src: Remove redundant includes 2020-06-02 07:42:32 +00:00
qualcomm src: Remove unused '#include <timer.h>' 2020-06-02 07:39:05 +00:00
rockchip src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
samsung samsung/exynos5420: add resources during read_resources() 2020-05-14 21:27:34 +00:00
sifive soc/sifive/fu540: Add chip_operations stub 2020-05-28 09:30:51 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00